Wyniki wyszukiwania: application note
NO. | Symbol elementu | Rozmiar pliku | Stron | Opis dokumentacji | Producent |
---|---|---|---|---|---|
1. | Application note | 37 KB | 4 | Figure 43 Design File for Configuring FLEX 10K & FLEX 6000 (37 KB) | Altera |
2. | Application note | 1.00 MB | 102 | AN 116: Configuring SRAM-Based LUT Devices | Altera |
3. | Application note | 43 KB | 4 | Figure 43 Design File for Configuring APEX 20K (43 KB) | Altera |
4. | Application note | 1.53 MB | 50 | AN 119: Implementing High-Speed Search Applications with Altera CAM | Altera |
5. | Application note | 591 KB | 56 | AN 115: Using the ClockLock & ClockBoost PLL Features in APEX Devices | Altera |
6. | Application note | 229 KB | 15 | AN 138: LVDS Signaling Using APEX Devices I/O Pins | Altera |
7. | Application note | 160 KB | 12 | AN 107: Using Altera Devices in Multi-Voltage Systems | Altera |
8. | Application note | 212 KB | 13 | AN 114: Designing with FineLine BGA Packages | Altera |
9. | Application note | 349 KB | 24 | AN 106: Designing with 2.5-V Devices | Altera |
10. | Application note | 1.35 MB | 30 | AN 117: Using Selectable I/O Standards in Altera Devices | Altera |
11. | Application note | 108 KB | 10 | AN 162: Increasing System Bandwidth with CDS | Altera |
12. | Application note | 399 KB | 39 | AN 33: Configuring FLEX 8000 Devices | Altera |
13. | Application note | 439 KB | 21 | AN 38: Configuring Multiple FLEX 8000 Devices | Altera |
14. | Application note | 469 KB | 24 | AN 122: Using Jam STAPL for ISP & ICR via an Embedded Processor | Altera |
15. | Application note | 299 KB | 31 | AN 91: Understanding FLEX 10K Timing | Altera |
16. | Application note | 305 KB | 8 | AN 96: Performance Measurements of Typical Applications | Altera |
17. | Application note | 247 KB | 12 | AN 97: Comparing Performance of High-Density PLDs | Altera |
18. | Application note | 127 KB | 4 | AN 99: Comparing Performance of Dual-Port Memory Functions | Altera |
19. | Application note | 738 KB | 56 | AN 101: Improving Performance in FLEX 10K Devices with the Synplify Software | Altera |
20. | Application note | 273 KB | 14 | AN 90: SameFrame Pin-Out Design for FineLine BGA Packages | Altera |
21. | Application note | 325 KB | 29 | AN 39: IEEE 1149.1 (JTAG) Boundary-Scan Testing in Altera Devices | Altera |
22. | Application note | 312 KB | 12 | AN 51: Using Programmable Logic for Gate Array Designs | Altera |
23. | Application note | 202 KB | 24 | AN 73: Implementing FIR Filters in FLEX Devices | Altera |
24. | Application note | 150 KB | 8 | AN 80: Selecting Sockets for Altera Devices | Altera |
25. | Application note | 512 KB | 12 | AN 74: Evaluating Power for Altera Devices | Altera |
26. | Application note | 118 KB | 8 | AN 81: Reflow Soldering Guidelines for Surface-Mount Devices | Altera |
27. | Application note | 224 KB | 11 | AN 36: Designing with FLEX 8000 Devices | Altera |
28. | Application note | 166 KB | 10 | AN 42: Metastability in Altera Devices | Altera |
29. | Application note | 261 KB | 15 | AN 75: High-Speed Board Designs 3.01 | Altera |
30. | Application note | 204 KB | 21 | AN 76: Understanding FLEX 8000 Timing | Altera |
31. | Application note | 237 KB | 18 | AN 77: Understanding MAX 9000 Timing | Altera |
32. | Application note | 227 KB | 15 | AN 78: Understanding MAX 5000 & Classic Timing | Altera |
33. | Application note | 196 KB | 11 | AN 85 In-System Programming Times for MAX Devices | Altera |
34. | Application note | 210 KB | 12 | AN 109: Using the HP 3070 Tester for In-System Programming | Altera |
35. | Application note | 214 KB | 12 | AN 94: Understanding MAX 7000 Timing | Altera |
36. | Application note | 285 KB | 12 | AN 82: Highly Optimized 2-D Convolver | Altera |
37. | Application note | 174 KB | 16 | AN 83: Binary Numbering Systems | Altera |
38. | Application note | 191 KB | 8 | AN 133: QDR SRAM Controller Function | Altera |
39. | Application note | 225 KB | 16 | AN 130: CDR in Mercury Devices | Altera |
40. | Application note | 507 KB | 48 | AN 131: Using General Purpose PLLs in Mercury Devices | Altera |
41. | Application note | 185 KB | 14 | AN 128: Implementing Voice Over Internet Protocol | Altera |
42. | Application note | 174 KB | 12 | AN 132: Implementing Multiprotocol Label Switching with Altera PLDs | Altera |
43. | Application note | 259 KB | 16 | AN 118: Scripting with Tcl in the Quartus Software | Altera |
44. | Application note | 1.54 MB | 36 | AN 123: Using Timing Analysis in the Quartus II Software | Altera |
45. | Application note | 2.40 MB | 36 | AN 161: Using the LogicLock Methodology in the Quartus II Design Software | Altera |
46. | Application note | 195 KB | 14 | AN 43: Designing for MAX 9000 Devices | Altera |
47. | Application note | 195 KB | 14 | AN 43: Designing for MAX 9000 Devices | Altera |
48. | Application note | 168 KB | 8 | AN 45: Configuring FLASHlogic Devices | Altera |
49. | Application note | 168 KB | 8 | AN 45: Configuring FLASHlogic Devices | Altera |
50. | Application note | 165 KB | 8 | AN 49: Implementing CRCCs In Altera Devices | Altera |
51. | Application note | 165 KB | 8 | AN 49: Implementing CRCCs In Altera Devices | Altera |
52. | Application note | 302 KB | 16 | AN 71: Guidelines for Handling J-Lead & QFP Devices | Altera |
53. | Application note | 302 KB | 16 | AN 71: Guidelines for Handling J-Lead & QFP Devices | Altera |
54. | Application note | 453 KB | 27 | AN 88: Using the Jam Language for ISP via an Embedded Processor | Altera |
55. | Application note | 453 KB | 27 | AN 88: Using the Jam Language for ISP via an Embedded Processor | Altera |
56. | Application note | 215 KB | 20 | AN 100: In-System Programmability Guidelines | Altera |
57. | Application note | 215 KB | 20 | AN 100: In-System Programmability Guidelines | Altera |
58. | Application note | 194 KB | 12 | AN 111: Embedded Programming Using the 8051 and Jam Byte-Code | Altera |
59. | Application note | 194 KB | 12 | AN 111: Embedded Programming Using the 8051 and Jam Byte-Code | Altera |
60. | Application note | 1.89 MB | 76 | AN 120: Using the LVDS in APEX 20KE Devices | Altera |
61. | Application note | 1.89 MB | 76 | AN 120: Using the LVDS in APEX 20KE Devices | Altera |
62. | Application note | 509 KB | 34 | AN 134: Using Programmable I/O Standards in Mercury Devices | Altera |
63. | Application note | 509 KB | 34 | AN 134: Using Programmable I/O Standards in Mercury Devices | Altera |
64. | Application note | 67 KB | 7 | AN 168: Getting Started with the LeonardoSpectrum Software | Altera |
65. | Application note | 67 KB | 7 | AN 168: Getting Started with the LeonardoSpectrum Software | Altera |
66. | Application Note | 205 KB | 8 | Using a Personal Computer to Program the AT89C51/C52/LV51/LV52/C1051/C2051 | Atmel |
67. | Application Note | 264 KB | 11 | AT89C51 In-Circuit Programming | Atmel |
68. | Application Note | 44 KB | 7 | Controlling FPGA Configuration with a Flash-based Microcontroller | Atmel |
69. | Application Note | 34 KB | 4 | Programming Atmel's Family of Flash Memories | Atmel |
70. | Application Note | 70 KB | 6 | Analog-to-Digital Conversion Utilizing the AT89CX051 MCU | Atmel |
71. | Application Note | 117 KB | 5 | Designing Boards with Atmel AT89C51/52, AT89C1051 for writing Flash at In-Circuit Test , This Application Note details how to write nonvolatile memories during in-circuit testing operations. | Atmel |
72. | Application Note | 68 KB | 4 | Interfacing 25CXXX Serial EEPROMs with AT89CXX | Atmel |
73. | Application Note | 48 KB | 13 | AT89S8252 Primer | Atmel |
74. | Application Note | 93 KB | 3 | Interfacing AT24CXX Serial EEPROMs with AT89CX051 MCU | Atmel |
75. | Application Note | 67 KB | 4 | Interfacing 93CXXX Serial EEPROMs with AT89CX051 MCU | Atmel |
76. | Application Note | 238 KB | 18 | Flash Microcontroller Architectural Overview | Atmel |
77. | Application Note | 107 KB | 16 | Flash Microcontroller Memory Organization | Atmel |
78. | Application Note | 588 KB | 33 | AT89 Series Hardware Description | Atmel |
79. | Application Note | 273 KB | 31 | Flash Microcontroller Presentation | Atmel |
80. | Application Note | 139 KB | 49 | 8051-Architecture Microcontroller Instruction Set | Atmel |
81. | Application Note | 103 KB | 6 | Atmel PLDs Architectures Simplify Timing Calculation | Atmel |
82. | Application Note | 207 KB | 11 | ATV2500 Application Example: Video Frame Grabber | Atmel |
83. | Application Note | 159 KB | 7 | Using the Programmable Polarity Control | Atmel |
84. | Application Note | 153 KB | 7 | Saving Power with Atmel PLDs | Atmel |
85. | Application Note | 179 KB | 16 | Using the ATV2500 and ATV2500B | Atmel |
86. | Application Note | 139 KB | 13 | Using the ATV750 and ATV750B | Atmel |
87. | Application Note | 158 KB | 12 | Introduction to the SMD Product Listing | Atmel |
88. | Application Note | 161 KB | 20 | Tips on Using Test Vectors for Atmel PLDs | Atmel |
89. | Application Note | 102 KB | 7 | Using a PLD as a System Controller in an I/O Bus Based System | Atmel |
90. | Application Note | 59 KB | 4 | Selecting Decoupling Capacitors for Atmel PLDs | Atmel |
91. | Application Note | 57 KB | 4 | Using Programmable Logic Devices | Atmel |
92. | Application Note | 282 KB | 16 | Using the ATF1500(A) CPLD | Atmel |
93. | Application Note | 275 KB | 5 | OrCAD Support for Atmel PLDs | Atmel |
94. | Application Note | 195 KB | 10 | ATF1500 44-Pin Complex Logic | Atmel |
95. | Application Note | 173 KB | 12 | Atmel PLD Design Guidelines | Atmel |
96. | Application Note | 117 KB | 7 | ATF15xx Product Family Conversion | Atmel |
97. | Application Note | 102 KB | 20 | ATF1500AS Family Demo Board | Atmel |
98. | Application Note | 828 KB | 14 | Using Active-VHDL Design Entry and Behavioral Simulation with Atmel IDS 6.0 | Atmel |
99. | Application Note | 77 KB | 4 | Creating Atmel JAM/JBC File(s) for the ATF1500AS Device Family | Atmel |
100. | Application Note | 116 KB | 10 | In-System Programming of Atmel ATF1500AS Devices on the HP3070 | Atmel |